NORA: a racefree dynamic CMOS technique for pipelined logic structures
- 1 June 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 18 (3), 261-266
- https://doi.org/10.1109/jssc.1983.1051937
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- High-speed compact circuits with CMOSIEEE Journal of Solid-State Circuits, 1982
- High-density CMOS ROM arraysIEEE Journal of Solid-State Circuits, 1977
- High-speed programmable logic arrays in ESFI SOS technologyIEEE Journal of Solid-State Circuits, 1976
- Clocked CMOS calculator circuitryIEEE Journal of Solid-State Circuits, 1973