Semiparallel microelectronic implementation of neural network models using CCD technology

21 May 1987

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 23 (11), 580-581
https://doi.org/10.1049/el:19870416

Abstract

A new generic architecture for realising the basic functions of neural networks is described. In the proposed configuration the N × N interconnectivity problem is accomplished by a simultaneous combination of horizontal and vertical shifting of CCD arrays. The proposed devices can be implemented with present-day technologies.

Keywords

NEURAL NETWORK SIMULATION
NEURAL NETWORK MODELS
COMBINED HORIZONTAL AND VERTICAL SHIFT
CCD TECHNOLOGY
GENERIC ARCHITECTURE
N× N INTERCONNECTIVITY PROBLEM
PRESENT-DAY TECHNOLOGIES
MICROELECTRONIC IMPLEMENTATION

This publication has 2 references indexed in Scilit:

Parallel Distributed Processing
Published by MIT Press ,1987
An artificial neural network integrated circuit based on MNOS/CCD principles
AIP Conference Proceedings, 1986

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