The design and implementation of a first-generation CELL processor
Top Cited Papers
- 30 August 2005
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 184-592 Vol. 1
- https://doi.org/10.1109/isscc.2005.1493930
Abstract
A CELL processor is a multi-core chip consisting of a 64b power architecture processor, multiple streaming processors, a flexible IO interface, and a memory interface controller. This SoC is implemented in 90nm SOI technology. The chip is designed with a high degree of modularity and reuse to maximize the custom circuit content and achieve a high-frequency clock-rate.Keywords
This publication has 2 references indexed in Scilit:
- A 4.8GHz fully pipelined embedded SRAM in the streaming processor of a CELL processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A streaming processing unit for a CELL processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005