Two-dimensional dopant profiling of deep submicron MOS devices by electron holography
- 28 November 2002
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 713-716
- https://doi.org/10.1109/iedm.1998.746456
Abstract
We show that electron holography can be used to obtain high resolution two-dimensional maps of deep submicron CMOS structures. Our results can be summarized as follows. (1) We have directly mapped the 2D electrostatic potential distribution in MOS transistors down to 0.18 /spl mu/m in feature size, and hence delineated the source/drain areas with sub-10 nm spatial resolution. (2) By matching with process simulation, we show that subtle, but important effects, such as enhanced B loss from source/drain areas under sidewalls, can be revealed. (3) Our approach uses a standard field-emission TEM, requires no free parameters, and the results do not depend on the precise choice of experimental conditions.Keywords
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