Bilayer resist process for exposure with low-voltage electrons (STM-lithography)
- 1 January 1996
- journal article
- Published by Elsevier BV in Microelectronic Engineering
- Vol. 30 (1-4), 447-450
- https://doi.org/10.1016/0167-9317(95)00284-7
Abstract
No abstract availableKeywords
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