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Modeling of defects in integrated circuit photolithographic patterns
Home
Publications
Modeling of defects in integrated circuit photolithographic patterns
Modeling of defects in integrated circuit photolithographic patterns
CS
C. H. Stapper
C. H. Stapper
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1 July 1984
journal article
Published by
IBM
in
IBM Journal of Research and Development
Vol. 28
(4)
,
461-475
https://doi.org/10.1147/rd.284.0461
Abstract
No abstract available
Cited by 180 articles