3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor
- 1 March 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 29 (3), 298-302
- https://doi.org/10.1109/4.278351
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- 3.3 V, novel circuit techniques for a 2.8-million-transistor BiCMOS RISC processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 120 MHz BiCMOS superscalar RISC processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1993
- 0.5- mu m 3.3-V BiCMOS standard cells with 32-kilobyte cache and ten-port register fileIEEE Journal of Solid-State Circuits, 1992