Realistic Yield Simulation for VLSIC Structural Failures
- 1 November 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 6 (6), 965-980
- https://doi.org/10.1109/tcad.1987.1270338
Abstract
No abstract availableKeywords
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