High-performance CMOS fabricated on ultrathin BESOI with sub-10 nm ttv
- 30 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 134-135
- https://doi.org/10.1109/soi.1993.344562
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- A High Performance 0.25/spl mu/m CMOSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1993
- Silicon‐On‐Insulator by Wafer Bonding: A ReviewJournal of the Electrochemical Society, 1991