Asynchronous arithmetic for VLSI neural systems
- 1 January 1987
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 23 (12), 642-643
- https://doi.org/10.1049/el:19870459
Abstract
A computational style is described that mimics that of a biological neural network. Circuit forms of neural and synaptic functions are presented, and results of simulation and fabrication are reported.Keywords
This publication has 3 references indexed in Scilit:
- VLSI implementation of a neural network memory with several hundreds of neuronsAIP Conference Proceedings, 1986
- VLSI architectures for implementation of neural networksAIP Conference Proceedings, 1986
- An artificial neural network integrated circuit based on MNOS/CCD principlesAIP Conference Proceedings, 1986