The Second Generation MOTIS Mixed-Mode Simulator

Abstract

This paper describes the second generation MOTIS mixed-mode simulator. In particular, It extends the current modeling capabilities to include resistors, floating capacitors, and bidirectional transmission gates. It employs a relaxation algorithm with local time-step control for timing simulation, and a switch level approach for unit delay simulation. It provides logic and timing verification for general MOS circuits in a mixed-mode environment. The new simulator is being used for production chips, and it is more accurate, flexible, and efficient than the existing MOTIS mixed-mode simulator.