Placement Algorithms for Custom VLSI
- 1 January 1983
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 1 (0738100X), 164-170
- https://doi.org/10.1109/dac.1983.1585643
Abstract
Algorithms are presented for placement and for modifying existing placements to be used in channel routing solutions for custom VLSI layout. The placements are produced so as not to have channel routing order constraint cycles, which constitute a familiar problem for custom VLSI. The algorithms are based on mathematical results characterizing the structure of channel routing order constraints.Keywords
This publication has 7 references indexed in Scilit:
- SHARPS: A Hierarchical Layout System for VLSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Wall representations of rectangular dissections: additional resultsEnvironment and Planning B: Planning and Design, 1980
- Placement Algorithms for Arbitrarily Shaped BlocksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Wall Representations of Rectangular Dissections and Their Use in Automated Space AllocationEnvironment and Planning B: Planning and Design, 1978
- Representation and Generation of Rectangular DissectionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Methods for Hierarchical Automatic Layout of Custom LSI Circuit MasksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Big Omicron and big Omega and big ThetaACM SIGACT News, 1976