Thermally-induced cracking in the fabrication of semiconductor devices

Abstract

The literature bearing on the cracking of semiconductor devices due to thermally induced strains is reviewed. A model is developed to describe in qualitative terms, the stress distribution and mechanics of cracking; and the significant variables of the cracking process are summarized. The remedial measures which have been proposed as solutions to the cracking problem are discussed. An analytical model is given which describes the stress distribution in the chip of a semiconductor device, and predicts a location of maximum stress which is in agreement with experimental results. A formula is derived for the calculation of the maximum semiconductor tensile stress in an elastic model. The modifications required of the model in cases of inelastic behavior are discussed. Three appendices are given to present: l) experimental methods of crack detection, 2) analytical design methods for tabbed device structures, and 3) references for some structural properties of germanium and silicon.