Performance comparisons across different computer archi- tectures cannot usually separate the architectural contribu- tion from various implementation and technology contribu- tions to performance. This paper compares an example im- plementation from the RISC and CISC architectural schools (a MIPS M/2000 and a Digital VAX 8700) on nine of the ten SPEC benchmarks. The organizational similarity of these machines provides an opportunity to examine the purely architect ural advantages of RISC. The RISC approach of- fers, compared with VAX, many fewer cycles per instruc- tion but somewhat more instructions per program. Using results from a software monitor on the MIPS machine and a hardware monitor on the VAX, this paper shows that the re- sulting advantage in cgcles per program ranges from slightly under a factor of 2 to almost a factor of 4, with a geometric mean of 2,7. It also demonstrates the correlation between cycles per instruction and relative instruction count. Vari- ous reasons for this correlation, and for the consistent net advantage of RISC, are discussed.