The physical limitations imposed by geometric effects have been investigated on silicon MOS structures. N-channel silicon gate MOS transistors were fabricated using electron-beam lithography and dry-processing techniques. The devices fabricated include discrete transistors, inverters, and ring oscillators. Channel length and width dimensions were independently varied from 10µm to 0.25µm. Two static short channel effects were observed. One was the widening of the drain resistance (rd) and the other was a shift in the threshold voltage towards depletion as the channel length decreased and towards enhancement as the gate-width decreased. Dynamic characterization of the ring oscillators showed stage delay times below 4 × 10-10seconds for 1µm gate lengths.