Time-domain macromodels for VLSI interconnect analysis
- 1 January 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 13 (10), 1257-1270
- https://doi.org/10.1109/43.317469
Abstract
No abstract availableThis publication has 24 references indexed in Scilit:
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