A high-speed logic LSI using diffusion self-aligned enhancement depletion MOST

1 January 1975

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XVIII, 124-125
https://doi.org/10.1109/isscc.1975.1155361

Abstract

Sub-nanosecond, sub-picojoule gates with standard photolithographic technology have been realized using a DSAED-MOS ring oscillator. This paper will describe a high-speed (2.9 ns/2pJ) logic LSI, using this unit gate design.

Keywords

LARGE SCALE INTEGRATION
LOGIC DEVICES
HIGH SPEED INTEGRATED CIRCUITS
RING OSCILLATORS
VOLTAGE CONTROL
LOGIC GATES
LABORATORIES
LOGIC CIRCUITS
THRESHOLD VOLTAGE
ION IMPLANTATION

This publication has 1 reference indexed in Scilit:

Invited: Integrated injection logic - A new approach to LSI
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1974

Cited by 4 articles