Low-IF topologies for high-performance analog front ends of fully integrated receivers
- 1 March 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
- Vol. 45 (3), 269-282
- https://doi.org/10.1109/82.664233
Abstract
No abstract availableThis publication has 10 references indexed in Scilit:
- A 12.5 MHz CMOS continuous time bandpass filterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- An analog radio front-end chip set for a 1.9 GHz mobile radio telephone applicationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Decimation for bandpass sigma-delta analog-to-digital conversionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Design techniques for high-performance full-CMOS OTA-RC continuous-time filtersIEEE Journal of Solid-State Circuits, 1992
- Designing filters for polyphase filter banksIEE Proceedings G Circuits, Devices and Systems, 1992
- The design of high dynamic range continuous-time integratable bandpass filtersIEEE Transactions on Circuits and Systems, 1991
- A 270 kbit/s 35 mW modulator IC for GSM cellular radio hand-held terminalsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1990
- CMOS active filter design at very high frequenciesIEEE Journal of Solid-State Circuits, 1990
- On two-dimensional polyphase filter banksIEEE Transactions on Acoustics, Speech, and Signal Processing, 1986
- A CORDIC Arithmetic Processor ChipIEEE Journal of Solid-State Circuits, 1980