A Theorem for Deriving Majority-Logic Networks Within an Augmented Boolean Algebra

Abstract

Recent developments in computer technology have produced devices (parametrons, Esaki diodes) that act logically as binary majority-decision elements. Conventional design techniques fail to utilize fully the logical properties of these devices. The resulting designs are extravagant with respect to the number of components used and the operating time required. This paper reviews the conventional technique briefly and proposes an alternative method that produces more nearly minimal designs.