Benchmarking the CM-5 multicomputer
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 100-107
- https://doi.org/10.1109/fmpc.1992.234900
Abstract
The authors study the performance of the CM-5 multiprocessor. They provide a number of benchmarks for its communication and computation performance. Many of the operations, like scans and global reduction, can be performed using special hardware available on the CM-5. These operations have been benchmarked. The authors also describe how to embed a mesh and a hypercube on a CM-5 architecture and provide timings for some mesh and hypercube communication primitives on the CM-5.Keywords
This publication has 2 references indexed in Scilit:
- Communication performance of the Intel Touchstone DELTA meshPublished by Office of Scientific and Technical Information (OSTI) ,1992
- Benchmarking the iPSC/2 hypercube multiprocessorConcurrency: Practice and Experience, 1989