A Josephson junction analogue incorporating the effects of thermal noise and phase-dependent conductivity

Abstract

An analogue model based on the equivalence between a phase-locked loop and a Josephson junction has been built to study the effect of thermal noise on junction I-V characteristics. The model differs from previous designs by employing an FET to simulate the phase-dependent junction resistance or cos phi term. The behaviour of the analogue is in good agreement with the theoretical predictions of Ambegaokar and Halperin (1969) and of Falco et al. (1973).