Effect of Scaling of Interconnections on the Time Delay of VLSI Circuits
- 1 April 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 17 (2), 275-280
- https://doi.org/10.1109/jssc.1982.1051729
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
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