A Formal Method for the Specification, Analysis, and Design of Register-Transfer Level Digital Logic

1 January 1981

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 846-853
https://doi.org/10.1109/dac.1981.1585454

Abstract

This paper describes a method for formally modelling digital logic using algebraic relations. The types of relations necessary for modelling digital logic at the register-transfer (RT) level are developed. An extension of the model is shown which can be used for logic synthesis at the RT level.

Keywords

This publication has 3 references indexed in Scilit:

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