A-4096 bit one-transistor per-bit RAM with internal timing and low dissipation

Abstract

A 4k RAM with 150-mW dissipation and 12.7-mm2area, fitting a standard 18-pin DIL package, has been developed. Internal timing is realized through a fast-shift register.

Keywords

TIMING
CLOCKS
VOLTAGE
READ-WRITE MEMORY
SHIFT REGISTERS
CIRCUITS
SIGNAL GENERATORS
MOS CAPACITORS
SEMICONDUCTOR DEVICE MEASUREMENT
RANDOM ACCESS MEMORY

This publication has 1 reference indexed in Scilit:

Eliminating threshold losses in MOS circuits by varactor bootstrapping
Proceedings of the IEEE, 1971

Cited by 3 articles