Insulated-gate planar thyristors: I—Structure and basic operation

1 February 1980

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 27 (2), 380-387
https://doi.org/10.1109/T-ED.1980.19871

Abstract

A high-voltage planar triac which is controlled by an insulated-gate terminal is described. Its structure is related to the DMOS transistor on which it is based and its multiple operating modes are discussed in terms of an equivalent circuit composed of MOS and bi-polar transistors and resistors. A typical junction-isolated device has a 150-V breakdown and an on-resistance less than 10 Ω for a 400-µm-wide channel. The on-resistance can easily be scaled to very low values simply by increasing the device width. Extension of the MOS thryistor concept to other devices and higher voltages is described. Quantitative analysis and modeling of these new devices are described in a companion paper.

Keywords

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