The effects of MIC/MILC interface on the performance of MILC-TFTs

Abstract

High mobility, low temperature polycrystalline silicon thin film transistors (poly-Si TFTs) potentially enable the integration of driver circuits and pixel transistors on the same glass panel for large area displays. Solid phase crystallized TFTs (SPC-TFTs) have been studied extensively at processing temperatures of about 600/spl deg/C. However, due to the presence of a large density of intra- and inter-granular traps, SPC-TFTs suffer from poor device performance, such as high threshold voltage, high leakage current and early kink effect. Metal-induced lateral crystallization (MILC) at 500/spl deg/C is an alternative technology for realization of TFTs. Due to the presence of large longitudinal grains and lower trap densities, these devices exhibit better performance than SPC-TFTs. With self-aligned deposition of the crystallization inducing metal, it is discovered that the behaviour of conventional MILC-TFTs is strongly influenced by the overlapping of the drain metallurgical junction and the MIC/MILC interface, which consists of a grain boundary and trapped metallic impurities. Detrimental effects of this overlap can be eliminated by separating the interface from the junction. In this work, the performance of SPC- and MILC-TFTs are compared, particularly with regard to scalability and the onset of the kink effect.