Mismatch effects in time-interleaved oversampling converters
- 17 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 5, 429-432
- https://doi.org/10.1109/iscas.1994.409401
Abstract
Recently, a new architecture was proposed which utilizes the concept of time-interleaving in oversampling converters. Using this architecture, one is theoretically able to achieve higher resolutions by using an array of interconnected modulators without increasing the oversampling ratio or order of the modulators. Alternatively, the same resolution can be maintained with wider bandwidth input signals. This paper presents the first experimental results on this new family of modulators. As well, the practical issue of component mismatch for these converters are studied and some suggestions are made to alleviate the effects of this problem Author(s) Khoini-Poorfard, R. Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada Johns, D.A.Keywords
This publication has 2 references indexed in Scilit:
- Time-interleaved oversampling convertorsElectronics Letters, 1993
- Time interleaved converter arraysIEEE Journal of Solid-State Circuits, 1980