A substrate etch geometry for near ideal breakdown voltage in p-n junction devices

Abstract

A new junction-termination geometry is proposed which can be achieved by a simple etch. This etch effectively lowers peak surface fields in both plane and planar p-n junction devices without increasing peak bulk electric fields. This insures an ideal, or near-ideal, avalanche breakdown voltage. The further advantages of the proposed technique lie in a relative insensitivity to etch depth, a minimal loss in device area, and compatibility with planar technology. Theoretical and experimental results are given to illustrate the substrate-etch technique.