A fill-unit approach to multiple instruction issue
- 24 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- Interlock Collapsing ALU For Increased Instruction-level ParallelismPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- The SuperSPARC microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Organization of the Motorola 88110 superscalar RISC microprocessorIEEE Micro, 1992
- Alternative implementations of two-level adaptive branch predictionPublished by Association for Computing Machinery (ACM) ,1992
- The Metaflow architectureIEEE Micro, 1991
- Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computersIEEE Transactions on Computers, 1990
- A development environment for horizontal microcodeIEEE Transactions on Software Engineering, 1988
- Hardware Support For Large Atomic Units in Dynamically Scheduled MachinesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- Checkpoint Repair for High-Performance Out-of-Order Execution MachinesIEEE Transactions on Computers, 1987