CMOS current mode winner-take-all circuit with distributed hysteresis
- 22 June 1995
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 31 (13), 1051-1053
- https://doi.org/10.1049/el:19950729
Abstract
An analogue-VLSI winner-take-all circuit is enhanced through the addition of hysteretic feedback that emphasises the spatial locality of competing signals using a resistive network. This circuit has applications to tasks in areas such as image processing, in which inputs are not stationary with respect to the circuit array.Keywords
This publication has 3 references indexed in Scilit:
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