Front End Processing for a 100 MHz Flash-ADC-System
- 1 June 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 33 (3), 1066-1070
- https://doi.org/10.1109/tns.1986.4334534
Abstract
An intelligent interface for readout of a high speed (100 MHz), multichannel Flash-ADC System [1] is described. 3072 FADC channels are controlled and read by a system of 34 microprocessors M68000 placed at two different hierarchical levels. In addition to the readout itself, the processors perform a detailed pulse shape analysis neccessary for a compact and manageable data format. The purpose of the system is to exploit the good double track separation and time resolution provided by Flash-ADCs in conjunction with large drift chamber detectors such as JADE at PETRA [2] and OPAL at LEP [3]. Details of the system presently being installed at JADE are reviewed.Keywords
This publication has 4 references indexed in Scilit:
- A Multichannel 100 MHz Flash-ADC-System with Fastscan Zero SuppressionIEEE Transactions on Nuclear Science, 1985
- Readout of Drift Chambers with a 100 MHz Flash ADC SystemIEEE Transactions on Nuclear Science, 1983
- The jet-chamber of the JADE experimentNuclear Instruments and Methods in Physics Research, 1982
- Drift chamber electronics for time and pulse height measurements with multiple hit capacityNuclear Instruments and Methods, 1978