An efficient method of partitioning circuits for multiple-FPGA implementation.

Abstract
We &veloped a new meth~ called MP2, for partitioning networks into multiple (> 2) blocks each of which has both size and pin constraints. The MP2 method uses an improvement approach snd tries to minimize the total number of terrnintds of tdl blocks while sstistjing the pin and size constraints of every block It supports multiple classes of cells in input networks and blocks. It makes use of a scalar value of benejlt which captures lookshetd information. It is the tit improvement method tbst considers pin constraints of blocks. It has been applied to partitioning tedtrtology-mspped circuits into multiple FFGA chips. In sddhion to describing the MP2 meth~ we will discuss some interesting iindings we gleaned during our experiments.