Suppression of parasitic thick-field conduction mechanisms in silicon-gate m.o.s. integrated circuits

Abstract

In a silicon-gate m.o.s. integrated circuit, because of the presence of the additional polycrystalline-silicon interconnection layer, it is possible virtually to eliminate parasitic thick-field transistor action at certain critical points in the circuit by employing an earthed polycrystalline-silicon region as an electrostatic shield between metal and substrate.