A new self-align technology for GaAs analog MMIC's

Abstract

A new self-align technology suitable for fabrication of GaAs low-noise FET's and MMIC's is demonstrated. The present technology, which is based upon sidewall technology and pattern inversion technology, provides a negligible short-channel effect, a low-parasitic resistance and a well-controlled breakdown voltage, all of which are essentially required for high microwave performance. An experimental 0.5-µm gate FET fabricated using the new process exhibits a high transconductance such as 220 mS/mm and a low-noise figure such as 1.6 dB at 12 GHz.