A three-dimensional DRAM cell of stacked switching-transistor in SOI (SSS)

Abstract
A new three-dimensional one-transistor dynamic RAM cell is presented. It has a trench capacitor fabricated in the Si substrate. In addition, there is a switching transistor fabricated in a laser-induced SOI layer formed on top of the capacitor area. The cell's advantages are a high capacitor capture ratio (capacitor area/cell area) and the capability of possessing high capacitance even when the cell size is reduced to less than 5µm2.