An untrimmed D/A converter with 14-bit resolution
- 1 December 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 16 (6), 616-621
- https://doi.org/10.1109/jssc.1981.1051652
Abstract
Describes a monolithic 14-bit DAC which uses a new compensation technique for the DAC linearity, the `self-compensation technique', originated through a new concept. Since this technique automatically compensates for linearity error in the DAC by referring to a ramp function with about 17-bit linearity, a high precision DAC can be produced in monolithic form without the trimming of analog components. An experimental 14-bit DAC chip has been fabricated using analog compatible IIL technology and two-level metalization. A linearity error of less that /spl plusmn/1/2 LSB and a settling time of 1-2 /spl mu/s has been achieved.Keywords
This publication has 8 references indexed in Scilit:
- ContentsIEEE Spectrum, 1981
- A monolithic 12b+Sign successive approximation A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1980
- A monolithic 14-bit D/A converterIEEE Journal of Solid-State Circuits, 1979
- An inherently monotonic 12b DACPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Planar multilevel interconnection technology employing a polyimideIEEE Journal of Solid-State Circuits, 1978
- A monolithic 12-bit D/A converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1977
- Phosphorous Buried Emitter I2L for High-Voltage Operating CircuitsJapanese Journal of Applied Physics, 1977
- A simple three-terminal IC bandgap referenceIEEE Journal of Solid-State Circuits, 1974