Abstract
Although continuing cost and performance improvements of the new bipolar and MOS RAM devices are providing strong incentives for their greatly expanded use in mainframe memory and other storage applications, these components have not yet reached the degree of reliability required for large memory systems. Fortunately, however, memory system organization is compatible with a wide variety of low-cost fault detection and correction techniques6,10,11 that go a long way toward compensating for otherwise error-prone systems.

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