Multi-Mechanism Reliability Modeling and Management in Dynamic Systems
- 21 March 2008
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 16 (4), 476-487
- https://doi.org/10.1109/tvlsi.2007.915477
Abstract
Reliability failure mechanisms, such as time-dependent dielectric breakdown (TDDB), electromigration, and negative bias temperature instability (NBTI), have become a key concern in integrated circuit (IC) design. The traditional approach to reliability qualification assumes that the system will operate at maximum performance continuously under worst case voltage and temperature conditions. In reality, due to widely varying environmental conditions and an increased use of dynamic control techniques, such as dynamic voltage scaling and sleep modes, the typical system spends a very small fraction of its operational time at maximum voltage and temperature. In this paper, we show how this results in a reliability ";slack"; that can be leveraged to provide increased performance during periods of peak processing demand. We develop a novel, real time reliability model based on workload driven conditions. Based on this model, we then propose a new dynamic reliability management (DRM) scheme that results in 20%-35 % performance improvement during periods of peak computational demand while ensuring the required reliability lifetime.Keywords
This publication has 14 references indexed in Scilit:
- Interconnect lifetime prediction under dynamic stress for reliability-aware designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A comprehensive model of PMOS NBTI degradationMicroelectronics Reliability, 2005
- The case for lifetime reliability-aware microprocessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- An electromigration and thermal model of power wires for a priori high-level reliability predictionIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2004
- Transient effects and characterization methodology of negative bias temperature instability in pMOS transistorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scalingIEEE Journal of Solid-State Circuits, 2002
- Temperature cycling and thermal shock failure rate modelingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A consistent model for the thickness dependence of intrinsic breakdown in ultra-thin oxidesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Physical and predictive models of ultrathin oxide reliability in CMOS devices and circuitsIEEE Transactions on Device and Materials Reliability, 2001
- Electromigration failure modes in aluminum metallization for semiconductor devicesProceedings of the IEEE, 1969