On the size of PLAs required to realize binary and multiple-valued functions
Open Access
- 1 January 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 38 (1), 82-98
- https://doi.org/10.1109/12.8731
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- Using Decision Trees to Derive the Complement of a Binary Function with Multiple-Valued InputsIEEE Transactions on Computers, 1987
- Analysis of input and output configurations for use in four-valued CCD programmable logic arraysIEE Proceedings E Computers and Digital Techniques, 1987
- An Algorithm to Derive the Complement of a Binary Function with Multiple-Valued InputsIEEE Transactions on Computers, 1985
- Input Variable Assignment and Output Phase Optimization of PLA'sIEEE Transactions on Computers, 1984
- Logic Minimization Algorithms for VLSI SynthesisPublished by Springer Nature ,1984
- Multiple-Valued Decomposition of Generalized Boolean Functions and the Complexity of Programmable Logic ArraysIEEE Transactions on Computers, 1981
- On the Applications of Mobius Inversion in Combinatorial AnalysisThe American Mathematical Monthly, 1975
- Average Values of Quantities Appearing in Multiple Output Boolean MinimizationIEEE Transactions on Electronic Computers, 1965
- Statistical Complexity of Algorithms for Boolean Function MinimizationJournal of the ACM, 1965
- Average Values of Quantities Appearing in Boolean Function MinimizationIEEE Transactions on Electronic Computers, 1964