Nonvolatile memory operations of metal-ferroelectric-insulator-semiconductor (MFIS) FETs using PLZT/STO/Si(100) structures

Abstract
We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFIS FETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FET's show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the "write" pulse, which was applied before the measurements, even at the same "read" gate voltage.