Area-time model for synthesis of non-pipelined designs

6 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 48-51
https://doi.org/10.1109/iccad.1988.122460

Abstract

A mathematical model is presented for predicting the area-time tradeoff curve for nonpipelined data paths given a data-flow graph and a module set. Specifically, it examines operator cost and delay to predict the lower bound noninferior area-time curve. The model has been validated against designs generated by a program which synthesizes nonpipelined data paths.<>

Keywords

DELAY
CLOCKS
FLOW GRAPHS
WIRING
CONTRACTS
RESOURCE MANAGEMENT
MULTIPLEXING
PREDICTIVE MODELS
MATHEMATICAL MODEL
HUMANS

This publication has 1 reference indexed in Scilit:

MAHA: A Program for Datapath Synthesis
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1986

Cited by 20 articles