The authors introduce a diagonal active stacked capacitor cell with a highly packed storage node (DASH) for use in a 16-Mb DRAM (dynamic random access memory). This novel cell features a storage capacitor formed above a bit line and the diagonal active area, which provides a large storage capacitance, 35 fF/bit, in a cell size of 3.4 mu m/sup 2/. The average charge retention time measured using an experimental 2-kb array is 30 s at 40 degrees C, indicating that the DASH has a superior potential for application to 16-Mb DRAMs. The memory cell leakage current is controlled to the order of 10/sup -12/ A.<>