Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES
- 30 September 2003
- book chapter
- Published by Springer Nature in Lecture Notes in Computer Science
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Efficient uses of FPGAs for implementations of DES and its experimental linear cryptanalysisIEEE Transactions on Computers, 2003
- Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator BoardLecture Notes in Computer Science, 2001
- A 12 Gbps DES Encryptor/Decryptor Core in an FPGALecture Notes in Computer Science, 2000
- Fast DES Implementations for FPGAs and Its Application to a Universal Key-Search MachineLecture Notes in Computer Science, 1999