Multicast routing algorithms for 3-stage Clos ATM switching networks
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- Large scale atm multi-stage switching network with shared buffer memory switchesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A growable packet (ATM) switch architecture: design principles and applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Output-buffer switch architecture for asynchronous transfer modePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Asynchronous transfer mode switching architecture for broadband ISDN-multistage self-routing switching (MSSR)Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- On multicast path finding algorithmsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- A modular architecture for very large packet switchesIEEE Transactions on Communications, 1990
- A three-stage architecture for very large packet switchesInternational Journal of Communication Systems, 1989
- Steiner problem in networks: A surveyNetworks, 1987
- Optimal Location of PlantsManagement Science, 1976
- A Study of Non-Blocking Switching NetworksBell System Technical Journal, 1953