Design of a circulating-type analogue–digital convertor using bucket-brigade delay lines

Abstract

A hardware implementation of a circulating-type analogue–digital convertor using bucket-brigade delay lines (b.b.d.l.) is described. The b.b.d.l. used is a 32-stage commercially available device. This large number of stages is not necessary, and, in practice, a b.b.d.l. with two or three stages would be satisfactory. Such an analogue–digital convertor can be implemented economically, and would be able to convert input signals in the frequency range 0–500 kHz. The principal advantage in using the b.b.d.l. is in the reduction of the number of analogue switches required. Experimental results show that 4–6 bit conversion is readily achieved, although a compensator network to compensate for the b.b.d.l. losses is required.