Investigations of the Si3N4/Si/n-GaAs insulator-semiconductor interface with low interface trap density

Abstract

We have investigated the interface properties of rapid thermal annealed in situ deposited gate quality Si₃N₄/Si/n‐GaAs metal‐insulator‐semiconductor (MIS) capacitors. Conductance measurements show a minimum interface trap density of 10¹¹ eV⁻¹ cm⁻² located in the lower‐half of the GaAs band gap. The quasi‐static capacitance‐voltage (QSCV) curve shows the largest dip toward the high‐frequency C‐V curve ever observed in compound semiconductor‐based MIS structures. In spite of the lowest interface trap density for GaAs‐based MIS structures ever reported, conductance data reveal a rapid increase in the density of interface traps in the upper‐half of the band gap. Both the ac loss and the capacitive frequency dispersion of the interface traps agree with the single time constant model. The anomalous frequency dispersion of the measured capacitance can be satisfactory explained by the trap location in the band gap and rapid increase in the trap density in the upper‐half of the band gap.