Scaling trends for the on chip power dissipation
- 25 June 2003
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Power is increasingly becoming a performance bottleneck for high-end microprocessors. This work systematically quantifies various sources of on-chip power dissipation and predicts change in their relative contribution with scaling, thus, identifying key problematic areas. It is found that interconnects account for the single largest component of power and are likely to remain at formidable proportions in the future. However, other components are also rapidly becoming important.Keywords
This publication has 4 references indexed in Scilit:
- The future of wiresProceedings of the IEEE, 2001
- Impact of small process geometries on microarchitectures in systems on a chipProceedings of the IEEE, 2001
- A stochastic wire-length distribution for gigascale integration (GSI). I. Derivation and validationIEEE Transactions on Electron Devices, 1998
- The test of time. Clock-cycle estimation and test challenges for future microprocessorsIEEE Circuits and Devices Magazine, 1998