System Application of Hybrid Logic Circuitry

Abstract

A comparative performance rating of circuit techniques for performing logical functions in digital systems may be based upon: 1) Reliability and simplicity 2) Input and output capabilities 3) Propagation time 4) Cost. The ``Hybrid Transistor Diode Logic'' (HTDL) circuit technique employs either diodes or emitter follower transistors as gates and buffers, to maximize the circuit performance rating. The HTDL technique thus combines the advantages of lumped and distributed gain circuits. The cascading of diodes and emitter followers in logical gate matrices can be analyzed as the transmission of binary signals through a video system of a given bandwidth. The HTDL technique optimizes the use of the transistor through nonsaturating, low-impedance circuitry. This optimum use of 200-500 megacycle gain-bandwidth transistors is primarily limited by present-day packaging techniques and their inductive and capacitive loading effects upon the circuits. The development of macromodule packaging techniques, using 200-500 mc transistors, in HTDL circuitry, would permit system speeds (synchronous clock rates) to exceed 50 Mc.