A physical model for MOSFET output resistance
- 1 January 1992
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 569-572
- https://doi.org/10.1109/iedm.1992.307426
Abstract
The output resistance (R/sub out/) most important device parameters for analog applications. However, it has been difficult to model R/sub out/ correctly. In this paper, we present a physical and accurate output resistance model that can be applied to both long-channel and submicrometer MOSFETs. Major short channel effects and hot-carrier effect, such as channel-length modulation (CLM), drain-induced-barrier-lowering (DIBL) and substrate current induced output resistance reduction, are all included in this model, and it is scalable with respect to different channel length L, gate oxide thickness T/sub ox/ and power supply V/sub dd/. This model can be incorporated into existing MOSFET's model without introducing discontinuity.<>Keywords
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