Noise analysis and reduction in solid-state nanopores

Abstract

The electrical noise characteristics of ionic current through organic and synthetic nanopores have been investigated. Comparison to proteinaceous alpha-Hemolysin pores reveals two dominant noise sources in silicon nitride nanometre-scale pores: a high-frequency noise associated with the capacitance of the silicon support chip (dielectric noise), and a low-frequency current fluctuation with 1/ f α characteristics (flicker noise). We present a technique for reducing the dielectric noise by curing polydimethylsiloxane (PDMS) on the nanopore support chip. This greatly improves the performance of solid-state nanopore devices, yielding an unprecedented signal-to-noise ratio when observing dsDNA translocation events and ssDNA probe capture for force spectroscopy applications. (Some figures in this article are in colour only in the electronic version)